(1) Field of the Invention
The invention relates to the fabrication of Integrated Circuit devices, and more specifically to organic siloxane and silicon gel processing and the formation of air gaps as a low dielectric constant material between conductor lines.
(2) Description of the Prior Art
The formation of air gaps between conducting lines of high speed Integrated Circuits (IC's) is typically a combination of the deposition of a metal layer, selective etching of the metal layer to form the desired line patterns, the deposition of a porous dielectric layer or a disposable liquid layer which is then selectively removed to form the desired air-gaps.
The continuing effort to reduce the size of individual transistors and other devices commonly integrated on a semiconductor chip and to increase the density of Integrated Circuits results in a continuing reduction of the separation between conducting layers of materials. This reduction results in an increase of capacitive crosstalk between adjacent conductor lines of a semiconductor circuit, that is the voltage on the first conductor line alters or affects the voltage on the second conductor line. This alteration in voltage can cause erroneous voltage levels in the Integrated Circuit making the IC increasingly prone to faulty operation. It becomes therefore imperative to reduce the resistive capacitance (RC) time constant and the crosstalk between adjacent conducting lines.
The capacitance between adjacent conducting lines is highly, dependent on the insulator or dielectric used to separate the conducting lines. Conventional semiconductor fabrication typically uses silicon dioxide as a dielectric, this has a dielectric constant of about 3.9.
The use of many of the low dielectric constant materials is not feasible due to the fact that equipment is not available to properly process the new dielectric materials in various integrated circuits. Also, the chemical or physical properties of many low dielectric constant materials are usually difficult to make compatible with or integrate into conventional integrated circuit processing.
The lowest possible and therefore the ideal dielectric constant is 1.0, this is the dielectric constant of a vacuum whereas air has a dielectric constant of less than 1.001.
To reduce capacitive coupling and to reduce capacitive crosstalk, a major objective in the design of IC's is to reduce the Dielectric Constant (k) of the insulating layer between adjacent conductor lines of semiconductor circuits. The present invention makes a significant contribution within the scope of this effort.
U.S. Pat. No. 5,750,415 to Gnade et al. shows a method of forming air gaps between metal lines 16 by etching out a filler material, e.g. a disposable liquid layer 18. The disposable liquid layer 18 is removed from between the metal lines with the help of a porous silica precursor film 20 which gels to form a low-porosity silica film 24. The process and materials used in this procedure are different than those used as part of the present invention.
U.S. Pat. No. 5,461,003 to Havemann et al. shows a method of forming air gaps between metal lines 16 by etching out a filler material, e.g. a disposable liquid layer 18. The disposable liquid layer 18 is removed from between the metal lines with the help of a porous dielectric layer 20. The process and materials used in this procedure are different from those used as part of the present invention. This procedure also differs from the present invention in that no openings are formed in the overlying dielectric layer to etch out the filler material.
U.S. Pat. No. 5,668,398 to Havemann et al., the same comments apply to this patent as previously made regarding U.S. Pat. No. 5,461,003. This patent uses a disposable solid layer 18.
U.S. Pat. No. 5,324,683 to Fitch et al. shows a method of forming air gaps by selectively removing a sacrificial spacer (16a and 16b) or by selectively removing a sacrificial layer (28, 40). This removal is accomplished by etching while the layer and spacer material are different than those used for the present invention.
U.S. Pat. No. 5,510,645 to Pitch et al., the same comments apply to this patent as previously made regarding U.S. Pat. No. 5,324,683.